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Wednesday 28 December 2016

RAILWAY SECURITY SYSTEM

RAILWAY SECURITY SYSTEM BASED ON WIRELESS SENSOR NETWORKS: STATE OF THE ART
ABSTRACT
Railways are large infrastructures and are the prime mode of transportation in many countries. The railways have become a prime means of transportation owing to their capacity, speed, and reliability. Even a small improvement in performance of railways has significant economic benefits to rail industry. Thus, a proper maintenance strategy is required to govern optimization of inspection frequency and/or improvement in skill and efficiency. Accidents happening due to track breaking have been a big problem for railways for life security and timely management of services. This breakage needs to be identified in real time before a train actually comes near to the broken track and get subjected to an accident. In this paper, different kinds of rail defects inspection and maintenance methods are described and a basic algorithm is readdressed that makes use of wireless acoustic sensors for detecting cracks and breakages in the railway tracks.
Keywords: Cracks detection, railway security, acoustic sensor

INTRODUCTION
Railways comprise a large infrastructure and are an important mode of transportation in many countries. The railways have become a new means of transportation owing to their capacity, speed, and reliability, being closely associated with passenger and goods transportation; they have high risk associated with them in terms of human lives and cost of assets. The poor maintenance of the railways can lead to accidents. New technologies for railways and better safety measures are introduced time to time but still accidents do occur. Thus, a proper strategy is required for maintenance and inspection of tracks.
Detection and maintenance of rail defects are major issues for the rail community all around the world. The defects mainly include weld problems, internal defects worn out rails, head checks, squats, spalling and shelling, corrugations and rolling contact fatigue (RCF) initiated problems such as surface cracks. If these defects are not handled and corrected they can lead to rail breaks and accidents. There are numerous challenges to rail community and the infrastructure maintenance people such as to perform effective inspection and cost effective maintenance decisions. If these issues are taken care of properly, inspection and maintenance decisions can reduce potential risk of rail breaks and derailment.

TECHNIQUES FOR INSPECTING CRACKS IN RAILWAY TRACKS
Long Range Ultrasonic Testing (LRUT)
Authors in paper [4] focus on the limitations of methods in their ability to detect defects in the rail foot, especially in the side edges away from the region directly below the web and how the LRUT method provides a significant improvement for the same.
Long Range Ultrasonic Testing (LRUT) technique is proposed as a complimentary inspection technique to examine the foot of rails, especially in track regions where corrosion and associated fatigue cracking is likely, such as at level crossings. LRUT technique is found to be suitable for examining inaccessible areas of railway tracks such as areas where corrosion occurs and susceptible areas of fatigue cracking. In different parts of the rail section (such as head, web and foot) properties of guided waves are used and are examined for their capability to detect defects in each part.
A suitable array of transducers is developed that is able to generate selected guided wave modes in rails which allow a reliable long range inspection of the rail. The characteristics of ultrasonic guided waves in the rail complex geometrical profile have been identified.

Vision Based System
A rail track inspection technique using automated video analysis is proposed. The aim of the system is to replace manual visual checks performed by the railway engineers for track inspection. A combination of image processing and analysis methods is used in the paper to achieve high performance automated rail track inspection. This paper focuses on the issues of finding missing clips and finding blue clips which have been recently replaced in place of damaged clips.
The objective of the algorithm is to automatically find clips in video sequences and thereafter recognize whether they are broken and if they are new or old as indicated by their color. Metal clips hold the rail track to the sleepers on the ground. Clips are searched to locate their position. Some clips on the track may be broken or missing due to excessive strain on them as the train moves on the track which may lead to the track failure these missing clips are identified. The clips used may be of different color depending on whether it is new (blue color) or old (grey color). So a video color analysis is done on the clips and the results are given to track maintenance engineers.
The main image pre-processing steps in the recognition of clips include smoothing, edge detection, and short line removal.
The irregularities in the Railway track gauge reduces the service life of rail and vehicle, and even result in vehicle falling off rail or wheel trapping, which causes driving accidents. A dynamic inspection method of track gauge based on computer vision is developed in. The inspection system is constructed by using four CCD (Charge-coupled Device) cameras and two red laser sector lights. The inspection principle and corresponding calibration method of inspection system are analyzed. Several image processing technologies such as image component extraction, differential, adaptive iteration threshold, dilation and thinning are used to extract gauge points.
Experiment results have proved that the proposed inspection method is capable of fast obtaining track gauge value with high accuracy and repeatability, and meets the requirement of dynamic inspection for track gauge.
The method proposed in the paper confirms the calibration method for track gauge inspection by. The method strictly controls the change of railway gauge and provides an effective inspection method with high precision to railway engineers.

Train-Mounted GPR
A technique based on Ground-penetrating radar (GPR) is used for obtaining quantitative information about the depth and degree of deterioration of the track. This paper aims at automating the processing and interpretation of data to the extent whereby on-site interpretations may be achieved with minimal intervention of the expert. This is done through the development of new image and signal processing tools specifically for GPR data and the range of anomalies found on the track bed.
For monitoring track conditions and other infrastructure assets the most efficient way is by means of a train, which can collect data for many parameters simultaneously, where possible at normal line speed. A multichannel ground- penetrating radar system is presented in the paper which is capable of operating at speeds of up to 200 kmph. A road-rail variant of the system is also presented which can collect up to 6 simultaneous continuous channels across the track, and can deliver on-site interpretation of ballast thickness and quality, irregularities, weak spots and utilities.
Novel multivariate signal and image processing techniques are used that can automatically detect, quantify and map variations in ballast depth and condition. To enable automatic characterization and classification of regions of interest within the radar grams, multi-resolution texture analysis techniques are applied. The proposed system can probe the ballast both underneath and between the sleepers, thus potential problems can be identified with individual sleepers.

LED-LDR Assembly
An algorithm for crack detection in rail tracks is uses Light Emitting Diode and Light Emitting Resistor (LED-LDR) assembly which track the exact location of faulty track. The design proposed by the authors includes LED which are attached to one side of the rails and the LDR to the opposite side. When there are no cracks i.e. during normal operation, the LED light does not fall on the LDR and hence the LDR resistance is high. Subsequently, when the LED light falls on the LDR, the resistance of the LDR gets reduced and the amount of reduction will be approximately proportional to the intensity of the incident light. Consequently the light from the LED deviates from its path due to the presence of a crack or a break and there is a sudden decrease in the resistance value of the LDR. This change in resistance indicates the presence of a crack or some other similar structural defect in the rails. In order to detect the current location of the device in case of detection of a crack, a GPS receiver whose function is to receive the current latitude and longitude data is used. To communicate the received information, a GSM modem has been utilized. The function of the GSM module being used is to send the current latitude and longitude data to the relevant authority as an SMS. The robot is driven by four DC motors. If this system is employed only latitudes and longitudes of the broken track will only be received so that the exact location cannot be known.
GPRS module is used to get exact location of the broken rail track. ARM7 controller is also used owning to is low cost and less power consumption it also decreases the time used in detecting cracks.

RAIL TRACK INSPECTION USING SENSORS
Automatic Railroad Track Inspection
An automatic inspection system is proposed in the paper but it is limited to the track bed and the rails. Deployment of the rail track to cover maximum optimum segment is also discussed. Instead of six transducers employed in bi-static mode, a single mono-static mode T-R, transducers is used which offers a significant saving in material, installation, electronics, and space, as well as cost. The proposed system helps in monitoring high risks in track beds by deploying sensors at particular areas and by the use of probabilistic selection method to identify high risk areas.

Wireless Sensor Networks Based on Fuzzy Logic
The concept of fuzzy logic is used by author’s deployed sensors. A model for placing sensors on the railway track is described in the system. There are many base stations or control centers which collect the data from the numerous sensor nodes distributed on the railway tracks. Multi-layer routing is used to transmit the sensed data to control station. The sensor nodes transmit the data to their nearby cluster heads. Multi-layer routing is used; the nodes in lower layer transmit their data to higher layer instead of transmitting it directly to base station.
For detecting cracks on rail tracks ultrasonic method is used. Ultrasonic waves are injected into the rails by special transducers. High-energy signal is sent in two directions at predetermined intervals. The transmitted signal is propagated in the rail and is received by receivers. The nearby transmitters send ultrasonic waves with the same frequency but with different period’s .In this way, the receivers will be able to recognize the direction (left or right) from which they receive the signal. If there is a break or chafe in the rail, the amplitude of the waves received by receivers will be reduced and an alarm signal will be sounded.
To track cross (horizontal) defects that happen in the crown of the rail, the ultrasonic method is used: power is concentrated in the crown of the rail so that it becomes possible to track these defects as the ultrasonic waves are maximized. Ultrasonic sensors are alternately installed 1.75km apart from each other in the inside wall of the rail and they must be in complete contact with the crown of the rail, in this way by increasing the number of the rail which needs to be investigated.
Collision in the tracks can be avoided using sensors and a technique based on IR Rays & Sensors. Collisions are avoided by fixing the sensors in the train wheels and transmitting the rays in the track. The trains coming from opposite direction also have the same option. If two trains are on same track, the rays will get collided and get reflected back to the respective engines and the LED or Alarm will blink that will help in stopping the train.
The detection of Cracks is done using IR rays with the IR transmitter & receiver.IR receiver connected to the Signal Lamp or Electrified lamp with the IR sensor. CAN controller is connected to the main node and it sends the information via GSM and transmit the message to engine and to the nearest station. The detection of Cracks can be identified using IR rays and IR sensor.IR receiver is connected to the signal lamp and to the CAN controller. The electrified lamp is nothing but it sides of the tracks the electric lamp which is current flowing for the engines transportation.
A failure tolerant (FT) algorithm is proposed for monitoring the rail lines. The algorithm is based on the simultaneous use of movable and fixed sensor network design and has the ability to send information as online-offline.
The proposed algorithm reduces fault tolerance and energy consumption in the network thereby increasing network lifetime. The algorithm has two parts fixed and movable. The fixed algorithm works for sensor networks that are in places such as bridges, tunnels and special points. This algorithm collects information about seismic data and the bridge balance and Cracking in the foundations of bridges and Pressure on the bridge and investigates this information. Movable algorithm, displays how to collect information of fixed sensor network by installed networks on the locomotive or monitoring cars , it also check the balance point line and register in a data position. In this system, GPS will detect coordinates of points that their data is registered.

Track Surveying with Sensors
For Track surveying with sensors the authors have proposed an architecture which has sensor nodes deployed along a railway track as shown in Fig 1. The network consists of numerous control centers (sink nodes) that are connected through a wire lined connection, and the sensor nodes are deployed along the railway lines.The sensor nodes collect the necessary data and forward the data back to the sink.
An innovative railway track surveying procedure is described that uses sensors and simple components like a GPS module, GSM Modem and MEMS based track detector assembly [14]. The surveying system proposed in this paper can be used for both ballast and slab tracks. The railway geometrical parameters which are Track axis coordinates are obtained with integrated Global Positioning System (GPS) and Global System for Mobile communication (GSM) receivers.
The authors have proposed a cheap and simple scheme with sufficient ruggedness which is suitable in the Indian scenario that uses an LVDT arrangement to survey track geometry by using multi sensor, which has proved to be cost effective as compared to the existing methods. This sensor very accurate detection and it will send information immediately by using GSM. The system can be operated in tunnels without interruption
 
Fig 1. Architecture of Track Surveying with Sensors
Bridge damage status is monitored by the sensor and wireless modules, when the sensor not getting signal, immediately nearby wireless system notifies and alert or informs to the current train on the track. The above task can achieve through microcontrollers, GSM, LVDT.

RAIL DEFECT DETECTION PROCEDURE
Rail defect detection is a process for which many different detection techniques have been studied and implemented. In general, for a defect detection system, the following need to be made available: a system of sensors which traverses the rail tracks, a data acquisition system, an algorithm to process the data and classify the signals as those arising from a break or no break and finally a means for notifying the GPS position of the break to authorities so that necessary action may be taken. Figure discusses the flow of the process of fault detection and remediation in case of rail break instances. A schema of the discussed method is given in figure 2.
 
Fig 2 Break Detection procedure

CONCLUSION
Accidents occurring in railway transportation systems cost a large number of lives. Many people die and several others get physical and mentally injured. Accidents are the major causes for traumatic injuries. There is certain need of advanced and robust techniques that can not only prevent these accidents but also eradicate all possibilities of their occurrence. Wireless sensor network which continuously monitors the railway track through the sensors and detect any abnormality in the track. The sensor nodes are equipped with sensors that can sense the vibration in the railway track due a coming train. The geographical positioning sensors are placed on the trains. These sensors send the train’s geographic location. The complete process is needed to be real time in nature and should meet the deadlines. Optimization of the communication protocol and real time working network with minimum delay in multi-hop routing from the nodes to the train using a static base station is needed, so that the decision making can be done and the decision is forwarded to the train without any delay.

REFERENCES
[1] V.Reddy, “Deployment of an integrated model for assessment of operational risk in railway track”, Master Thesis, Queensland University of Technology School of Engineering Systems, 2007.
[2] C. Esveld, “Modern railway Track”. Second Edition, MRT Productions. 2001
[3] D.Hesse “Rail inspection using ultrasonic surface waves” Thesis ,Imperial College of London,2007
[4] C. Campos-Castellanos, Y.Gharaibeh, P. Mudge *, V. Kappatos, “The application of long range ultrasonic testing (LRUT) For examination of hard to access areas on railway tracks”. IEEE Railway Condition Monitoring and Non-Destructive Testing (RCM 2011) Nov 2011.
[5] M. Singh, S.Singh1,J.Jaiswal, J. Hempshall “Autonomus rail track inspection using vision based system” .IEEE International Conference on Computational Intelligence for Homeland Security and Personal Safety .October 2006. pp 56-59
[6] S.Zheng, X.An, X.Chai, L. Li “Railway track gauge inspection method based on computer vision” IEEE International Conference on Mechatronics and Automation, 2012. pp 1292-1296
[7] W. Al-Nuaimy , A. Eriksen and J. Gasgoyne “ Train-mounted gpr for high-speed rail trackbed inspection” Tenth International Conference on Ground Penetrating Radal; 21 -24 June, 2004
[8] A.Vanimiredd, D.A.Kumari “Automatic broken track detection using LED-LDR assembly” International Journal of Engineering Trends and Technology (IJETT) - Volume4 Issue7- July 2013
[9] Hayre, Harbhajan S., "Automatic Railroad Track Inspection," Industry Applications, IEEE Transactions on , vol.IA-10, no.3, pp.380,384, May 1974
[10] Z. Sam Daliri1, S. Shamshirband , M.A. Besheli “ Railway security through the use of wireless sensor networks based on fuzzy logic”. International Journal of the Physical SciencesVol. 6(3), pp. 448-458, 4 February, 2011
[11] S. Ramesh, S. Gobinathan “Railway faults tolerance techniques using wireless sensor networks”. IJECT Vol. 3, Issue 1, Jan. - March 2012.
[12] A. Z Lorestani ,S. A Mousavi, R. Ebadaty, “Monitoring RailTraffic Using Wireless Sensor Network (WSN)” IJCSET ,June 2012, Vol 2, Issue 6,1280-1282
[13] Aboelela, E.Edberg, W.Papakonstantinou, C.Vokkarane, V, "Wireless sensoer network based model for secure railway opeerations," Performance, Computing, and Communications Conference, 2006. IPCCC 2006. 25th IEEE International , vol., no., pp.6 pp.,628, 10-12 April 2006
[14] M. Kalaimathi, P. Ilakya & E. Sathiavathy. “Innovative railway track surveying with sensors and controlled by wireless communication” ,International Journal of Advanced Electrical and Electronics Engineering, (IJAEEE) pp 2278-8948, Volume-2, Issue-3, 2013.
[15] J Zhao; Chan, A. H C; Stirling, A.B., "Risk analysis of derailment induced by rail breaks - a probabilistic approach," Reliability and Maintainability Symposium, 2006. RAMS '06. Annual , vol., no., pp.486,491, 23-26 Jan. 2006SeongOun Hwang, ”Content and Service Protection for IPTV,” Broadcasting, IEEETransactions on , vol.55, no.2, pp.425,436, June 2009.

MICRO CONTROLLER BASED AC POWER CONTROLLER

MICRO CONTROLLER BASED AC POWER CONTROLLER
ABSTRACT
This paper discusses the design and implementation of single phase PWM inverter using 8051 microcontroller. The main features of 8051 based PWM inverter are simpler design, low cost, maximum range of voltage control and compact in size. The designed PWM inverter is tested on various AC loads like AC motor and intensity control of incandescent lamp in a closed loop environment.
Keywords: Gate Signals Generation, Micro Controller, Pulse Width Modulation, PWM Generation

INTRODUCTION
The pulse width inverters can be broadly classified as  
(1) Analog bridge PWM inverter
(2) Digital bridge PWM inverters
The advantage of Analog based PWM inverter controller is that, the level of inverter output voltage can be adjusted in a continuous range and the throughput delay is negligible. The disadvantages of Analog based PWM inverters are:
Analog component output characteristics changes with the temperature and time. They are prone to external disturbances. Analog controller circuitry is complex and bulky. They are non-programmable, hence not flexible.
On the other hand Microcontroller based PWM inverter controller (Digital bridge PWM inverter) makes the controller free from disturbances and drift, but the performance is not very much high due to its speed limitation. However to minimize throughput delay, some microcontroller based PWM inverters, retrieves switching patterns directly from memory so that calculation can be minimized, but this technique demands more memory. This drawback can be eliminated if switching pat-terns are generated by executing simple control algorithms. Even after using simple control algorithms, sometimes throughput delay may be substantial.
With the availability of advanced microcontrollers and DSP [Digital signal processor] controllers, with many advanced features like inbuilt PWM generator, event managers, time capture unit, dead time delay generators, watch dog timers along with high clock frequency, the limitation of speed, associated with microcontroller based PWM inverters can be neglected to some extent.
This paper presents a simple and cost effective technique of implementing single-phase AC [alternating current] voltage controller, used to control AC loads, which doesn’t demand very high precisions, using 8051 micro-controller.

PWM BRIDGE INVERTER REVIEW
Inverters can be classified as single-phase and three phase inverters and they are further classified as Voltage fed inverter [VSI.], current fed inverter [CFI], and variable DC [direct current] linked inverter. In Volt-age fed inverter, input voltage remains constant, in cur-rent fed inverter [CFI], input current remains constant and in variable DC [direct current] linked inverter, input voltage is controllable.
 
Figure 1. Single phase inverter.
 
Figure 2. O/P voltage/gate signals.
Figure 1 shows single phase bridge inverter with MOSFET switches. In spite of MOSFET switches having high ON state resistance and conduction losses, in this paper MOSFET switches are used because of the following reasons. MOSFET being a voltage con-trolled device, it can be driven directly from CMOS or TTL logic and the same gate signal can be applied to diagonally opposite switches. Also the gate drive current required is very low.
The working principle of Single-phase bridge inverter can be explained as follows.
Positive Voltage ‘Vs’ appears across the load, when MOSFET Q1 and Q2 conduct simultaneously. Negative voltage ‘Vs’ appears across the load, when Q3 and Q4 conduct simultaneously.
To overcome the effect of back emf in case of inductive load diodes, D1-D4 are used. Diode D1 and D2 are called feedback diodes, because when they conduct the energy is feedback to the DC source. The RMS output voltage is given by
where P is pulse width. The O/P voltage and gate signals are as shown in Figure 2.
CONTROLLER BLOCK DIAGRAM
The block diagram of microcontroller based bridge PWM inverter is as shown in Figure 3. The required four digit speed in RPM [Rotation per Minute] is entered through the keyboard and corresponding to the key pressed, digital equivalent of that RPM is stored in memory.
Current running speed of the AC motor is sensed through speed sensor, and the analog output given by the sensor is converted to digital data using Analog to Digi-tal converter [ADC].
 
Figure 3. Block diagram of controller.
 
Figure 4. Flowchart of basic operation.
 
Figure 5. Flow chart of keyboard logic.
 
Figure 6. Flowchart of keyboard logic.
 
Figure 7. Flowchart of A/D converter.
The digital data is accepted through 8051 microcontroller ports and is compared with required speed’s equivalent digital data. In accordance with the error signal, the width (duty cycle) of PWM signal is varied, which in turn controls the AC voltage.
From the generated PWM signal, required two gate signals are generated using external interrupt to drive the bridge inverter circuit.
Gate signals are boosted up to a sufficient voltage level by using gate driver circuit, so that it can drive the MOSFET switches of bridge inverter to the ON state. User can alter the speed at any instant of time in accordance to his requirements. Many additional features can be further added like sensing the temperature of room and automatically controlling either the speed of the fan or the level of air conditioning required. Figure 4 explains the logic flow of the basic operation.

CONTROLLER DESIGN
Controller is designed by using simpler low cost components like 8051 microcontroller, 8 or 12 bit Analog to Digital Converter (ADC), 4×4 keypad, 4 chopper MOS-FET switches (IRFZ48) and speed/Intensity sensor.
The controller design can be explained under 4 sections as:

Keypad Interface
A 4×4 keypad is interface with 8051 microcontroller as shown in Figure 5, through which four keys are accepted.
After accepting the four keys they are combined to rep-resent four digit required RPM, which actually represents the external memory address, in which digital equivalent of speed is stored.
For example if the keys entered are 1 (01), 2 (02), 3 (03), 4 (04), then they are combined as 1234 (RPM), which represents External memory address, in which 8 bit digital equivalent of that speed is stored. Higher byte of the memory address is stored in DPH [data pointer high byte]. Lower byte of the memory address is stored in DPL [data pointer low byte]. This method saves time since it doesn’t require any program execution to convert the entered speed in RPM into its digital equivalent. The other method is to enter equivalent digital data of RPM directly, provided a conversion chart is available [external look-up table]. This technique will save some memory access time, since communication with memory is avoided.

ADC Interfacing
Whenever speed varies from zero to maximum, the speed sensor O/P varies from zero to five volts respectively. An 8-bit ADC with resolution 1/28 is used to convert the analog voltage to digital data. Minimum of 19.5 mv change in voltage (corresponding change in RPM) is required to change the digital state of ADC. This limits the accuracy of the application. The logic of interfacing ADC is as explained in the flowchart given in the Figure 7.

PWM Generation
8051 microcontroller do not have on-chip PWM generator. It is implemented using ‘A’ register and any other register (R0-R7) as shown in Figure 8.
A count (ON period time) is loaded onto one of the GPR (General purpose register), which can be called as Duty cycle register and accumulator (‘A’) is loaded with zero. Register ‘A’ is incremented in steps of one and continuously compared with duty cycle register.
 
Figure 8. PWM generation.


 
Figure 9. Gate signal generation using interrupt.


 
Figure 10. Gate signal booster circuit.


 
Figure 11. Response for various loads with corresponding duty cycles.

If the ‘A’ contents are less than duty cycle register, high level is maintained at port line P1.1. When ‘A’ is higher than duty cycle register content a low level is maintained on port line. The alternate technique is to use Timer as Counter by applying clock pulses externally and comparing the count present in the counter with ‘A’ register (duty cycle register). This demands external clock source, since 8051 do not have any clock out pin.
Since the maximum time period is limited to 256 microseconds, the minimum frequency of PWM signal will be 4 KHz, but this can be changed using software delays. The AC signal frequency generated by PWM bridge inverter depends on PWM signal frequency. The error signal is generated by comparing the required speed with accepted digital equivalent speed divided by two. In proportionate with the error signal, PWM duty cycle is varied. When the required speed value is less than the accepted one, duty cycle register value and accepted value is decremented by one continuously till accepted value is equal to the required speed’s digital value. When the required speed value is more than the accepted one, duty cycle register values and accepted value is incremented by one continuously till accepted value is equal to the required speed digital values.

Gate Signal Generation
The generated controlled PWM signal itself will be one set of gate signal (g1, g2) and other set of gate signals (g3, g4) is generated using interrupt technique. The controlled PWM signal generated is given to the external interrupts, which is initialized as falling edge sensitive interrupt type. When controlled PWM signal’s falling edge occurs, an interrupt service routine meant for that particular external interrupt is executed.
In the interrupt service routine, a delay is created equal to the time, 7FH minus duty cycle register content, after which, the port line is made high and is retained high for the time duration decided by the contents of duty cycle register (Figure 9).
The gate signal (vg1 vg2, vg3, vg4) are boosted to a sufficient voltage level by Gate drive circuitry as shown in Figure 10, so that they are capable of driving MOS-FET’S to the ON state, when the gate signals are high.
A transistor switch (with inverted gate signals as in-put) is made used to boost the gate signal. The same DC supply, which is used for inverter is also used to drive the transistor by reducing the DC level using voltage dividers. The other technique is to use opto isolators. Both of these techniques use the same inverter DC source to boost up the gate signals, thus avoiding more usage of DC sources.

RESULTS AND CONCLUSIONS
The designed application is tested by designing 60V MOSFET bridge inverter.
Harmonics are removed by using simple capacitor filter and the AC voltage is stepped up to 220 V using step-up transformer. The performance of application is tested on various A.C loads and the plots of the same are as shown in Figure 10. The design exhibits good results for the load values of 50 ohm and 100 mH/ 10mH. A simple PWM technique with 100% duty cycle variation, which reduces hardware and software complexity, is used rather than using the most often used complex sinusoidal PWM technique (For Single-phase inverters). Required dead time is generated through interrupt, which avoids the usage of dead time delay generators. With minor modifications the same work can be used to control light intensity, temperature etc., The accuracy can be further improved by using high resolution ADC’s and the delay involved in the software can be overcome using higher versions of controllers.

REFERENCES
(1) H. Parasuram and B. Ramaswami, “A three phase sine wave reference generator for thyristorized motor control-lers,” IEEE Transactions on Industrial Electronics, Vol. IE-23, pp. 270–276, August 1976.
(2) J. M. D. Murphy, L. S. Howard, and R. G. Hoft, “Micro-processor control of PWM inverter induction motor drive,” in Record of the 1979 IEEE Power Electron Spe-cialist Conference, pp. 344–348.
(3) G. S. Buja and P. Fiorini, “Microcomputer control of PWM inverters,” IEEE Transactions on Industrial Elec-tronics, Vol. IE-29, pp. 212–216, August 1982.
(4) G. S. Buja and P. De Nardi, “Application of a signal processor in PWM inverter control,” IEEE Transactions on Industrial Electronics, Vol. IE-32, No. 1, February 1985.
(5) Y. K. Peng, et al., “A novel PWM technique in digital control,” IEEE Transactions on Industrial Electronics, Vol. 54, February 2007.
(6) M. H. Rashid, “Power Electronics Circuits, Devices and Applications,” 3rd Edition, Prentice-Hall of India, Private limited, New-Delhi, 2004.
(7) V. Jagannathan, “Introduction to power electronics,” Prentice-Hall of India, Private limited, New-Delhi, 2006.


HIGH VOLTAGE GENERATION BY USING COCKCROFT-WALTON MULTIPLIER

HIGH VOLTAGE GENERATION BY USING COCKCROFT-WALTON MULTIPLIER
ABSTRACT
In this paper present High Voltage DC generation by using Cockcroft-Walton Multiplier are purpose. This section is providing continues input current, with a low ripple cascading of diode and capacitor. Cockcroft-Walton multiplier provide suitable high DC voltage source from a low input voltage i.e, 230V AC supply which is rectified by using half wave rectifier circuit. Cockcroft-Walton multiplier constructed by ladder network of capacitor and diode for generation of high voltage. When number of stages of multiplier are increase output of the Cockcroft-Walton Multiplier is also increasing. In this paper 8 stages Cockcroft-Walton multiplier are use to generated high voltage. In this paper transformer method are eliminated therefore cost and size of Cockcroft-Walton multiplier are reduce. Other specifications considered carefully while designing multiplier and components must be used based on size consideration for expected load current and expected output voltage. A prototype was designed and experimental result was tested and demonstrate was purpose.
Key words - Cascading circuit, Cockcroft-Walton multiplier, High voltage, Voltage divider.

INTRODUCTION
High voltage generation DC power is widely used in the research work and industry level. It is also used in the scientific instrument, TV sets and CRTs, Oscilloscope, x-ray and photomultiplier tubes are used in nuclear industry for detection of radiation. The method stepping up the voltage is commonly done by a step-up transformer. The output of the secondary of the step up transformer increases the voltage and decreases the current and losses occurred in the transformer is more this is for case of AC system. But in DC system transformer are not in used because of the constant current in case of DC system and hence, constant flux which is not link primary to secondary and therefor transformer method are eliminated in the case of DC. For stepping up the voltage in DC system multiplier method are prefer. Multipliers are primarily used to develop high voltages where low voltage at the input side. In this section describes the concept to develop high voltage DC from a single phase AC ie. 230 Volt, 50 Hz system. Because of the safety consideration it was restricts the multiplication factor to 8 such that the output would be within 1KV. The design of the circuit involves Cockcroft-Walton multiplier, whose principle is to go on doubling the voltage for each stage. Thus, the output from an 8 stage voltage multiplier can generate up to 1KV.

COCKCROFT-WALTON MULTIPLIER
The Cockcroft-Walton is a voltage multiplier that converts AC or pulsing DC electrical power from a low voltage level to a higher DC voltage level. It is made up of a voltage multiplier ladder network of capacitors and diodes to generate high voltages. Unlike transformers, this method eliminates the requirement for the heavy core and the bulk of insulation/potting required. Using only capacitors and diode in cascading network these voltage multipliers can step up relatively low voltages to extremely high values, while at the same time being far lighter and cheaper than transformers.
 
Fig -1: Cockcroft-Walton multiplier
Where, C1,C2,C3…..Cn= Capacitor ,
D1,D2,D3…Dn =Diode, And 
ID1, ID2, ID3, ….. ID1 =Diode Current. 
The advantages of Cockcroft-Walton Multiplier circuit are low in cost, small in size and can be easy to insulate the circuit.
Another advantage of voltage of multiplier circuit is its peak to peak voltage at each stage will be double.
Consider operation of two stages Cockcroft-Walton multiplier is shown in figure1.
1) When TS is negative, then Capacitor C1 charges through Diode D1 to Vmax.
2) When Ts is positive, then Vmax add arithmetically existing potential C1, thus C2 charges to 2Vmax through D2.
3) Again Ts is negative, C3 charge 2Vmax through Diode D3.
4) Again Ts is positive, Capacitor C4 charge Diode D4 to 4Vmax.
Therefor output of multiplier = Vmax * N
Where,
N = Number of stages.
Designing of Multiplier circuit most commonly half wave circuits are used. And because of the multiplier circuit, high voltage develop at the output side of the Cockcroft-Walton multiplier circuit.
Design of Cockcroft voltage multiplier is simple Careful consideration of all component parameters is the only way to insure both reliable and predictable circuit performance.[2]
Ripple of the n-stage multiplier will be,
 ............(1)
from equation (1) it is clear that, multistage circuit the lowest capacitors are responsible for most ripple and it is, therefore, desirable to increase the capacitance in the lower stages.
Therefore, capacitors of equal value are used in practical circuits i.e., Cn = Cn – 1 = ... C1 = C and the ripple is given as,
 
The second quantity to be evaluated is the voltage drop ΔV which is the difference between the theoretical no load voltage 2nVmax and the onload voltage.
Voltage drop ΔV = (I/fc) (2/3 n³ + n²/2-n/6) 
Regulation of voltage = V/2nEm,
Ripple (%) = δV/2nEm

RIPPLE VOLTAGE
Ripple voltage is the magnitude of fluctuation in DC output voltage at a specific output current (assuming AC input voltage and AC input frequency are constant). A close approximation for series half-wave multipliers can be expressed as:
VRIP = I(N2+N/2)/8FC
Example: Calculate the ripple voltage of a 6 stage multiplier with 1000pF capacitors, 50kHz input frequency (sine wave), 1mA DC output current, 20kV DC output voltage:
VRIP = (1*10-3(62+6/2))/8*50000*(1*10-9))
VRIP = 97.5Vp-p

DESIGN AND TEST SETUP
For the application of various equipment in 8 stages Cockcroft-Walton multiplier designed with a multiplication of peak to peak voltage ie. N * Vmax at a last stages of Cockcroft-Walton multiplier.
 
Fig -2: Block diagram of test setup
A voltage divider is used for deviation of voltage with a very high resistance. The two main components are used in the setup as shown.in figure 2. They are amplifier and 8 stages voltage multiplier. Amplifier is used to amplify the DC input signal and 8 stages Cockcroft-Walton multiplier is used to step up DC voltage into a high voltage at 1KV or 1000 Volt  from 230 V AC voltage which rectified and convert in AC-DC. Voltage adjuster is used to adjust the voltage and amplifier end for supplying to the Cockcroft-Walton multiplier circuit. The operation of a multiplier is to be effectively multiplying the peak to peak voltage by number of stages and convert into high voltage. The voltage at the 1st stage of multiplication is 120V DC. The voltage at the 8th stage of multiplication is 960VDC. In theoretical consideration these values were somewhat reduced because of losses in the diodes, capacitances and leakage currents of the diodes, component tolerances of the diodes and capacitors, etc. The voltage divider in which high value of resistance are use. In the actual prototyped circuit, we used 10 Mohm resistors because of availability in the experiment. Components are used in prototype model Capacitor and Diode in cascade network, and operational amplifier (741). In figure 3. Shows that if the output voltage of a Cockcroft-Walton multiplier is increase according to number of stages. In theoretically at first stages output is 120 peak to peak voltage and at the end of 8 stages the peak to peak voltages is 960 volt. Developed high voltage D.C. Power supply based on Cockcroft-Walton voltage multiplier circuit. This circuit is a unique circuit which is developed for the special applications like field testing of high voltage cables, prime D.C. voltage. Construction of multiplier circuit is simple in nature because, it is cascading of diodes and capacitors which is low cost component this is the advantages of multiplier circuit and it also required less insulation from last stages of the voltage multiplier circuit.
 
Fig -3: Characteristics of output voltage and number of stages

CAPACITOR AND DIODE SELECTION
While designing multiplier and capacitor and diode must be used based on size consideration for expected load current and expected output voltage. Range of capacitor is commonly 1 microfarad to the 250 microfarad, whose voltage rating is usually twice that of actual peak to peak voltage. For example a capacitor which will see a peak voltage of 2Vmax should have a voltage rating of approximately 4Vmax. For selection of diode, parameter must be consider. When the maximum reverse voltage across a diode that is known as peak inverse voltage. This peak reverse voltage are available in each diode therefor for selection of diode rating which is 2 * Vmax for a safety purpose.

CONCLUSION
The Cockcroft-Walton Multiplier surface mount and design in which high voltage generate without use transformer is a beauty of the high voltage Cockcroft-Walton circuit. There for size of the complete high voltage circuit is small and cost is also less. This small size circuit gives high voltage at the end of multiplier circuit. Because of the light weighted circuit it is portable it gives high reliability. Construction of whole circuit is simple and robust in nature. This multiplier circuit is useful for a scientific instrument, TV sets and CRTs, Oscilloscope, x-ray and photomultiplier tubes and field testing of HV cables.

EXPERIMENTAL SETUP
In this experiment used 1 to 250 microfarad capacitor are used and IN 4007 Diode which is cascading in the Cockcroft-Walton multiplier circuit. Digital multimeter which is used to measure the High Voltage at the end of multiplier circuit.
 
Fig -4: Prototype setup of Cockcroft-Walton multiplier circuit

REFERENCES
[1]. D. F. Spencer, R. Aryaeinejad, E. L. Reber," Using the Cockcroft-Walton Voltage Multiplier Design in Handheld Devices”, INEEL/CON-01-01424 PREPRINT October 2001.
[2]. C. K. Dwivedi ,M. B. Daigavane," Multi-purpose low cost DC high voltage generator (60 kV output), using Cockcroft-Walton voltage multiplier circuit‖, International Journal of Science and Technology Education Research Vol. 2(7), pp. 109 - 119, July 2011.
[3]. G.S. Senthil Raaj, G.T. Sundar Rajan," Simulation and Implementation of Single-Phase Single-Stage High Step-Up AC–DC Matrix Converter based of Cockcroft–Walton Voltage Multiplier‖, International Conference on Innovations In Intelligent Instrumentation, Optimization And Signal Processing “ICIIIOSP-2013”
[4]. Cheeru G. suresh, Elizabedh Rajan,Chittesh V.C.,Chinnu G. suresh," Transformless high step-up DC-DC Cockcroft-Wolton multiplier in hybrid system‖, IRF International Conference on 10th August 2014, Cochin, India, ISBN: 978-93-84209-43-8
[5]. Nileena P. Subhash, Ajmal K.A, K. Punnagai Selvi," A High Step-Up Converter Using Transformerless Cockcroft-Walton Voltage Multiplier for a PV System,‖ International Conference on Engineering Technology and Science-(ICETS’14)
[6]. Adinath Jain, Simith E," AC-DC Matrix Converter Based On Cockcroft-Walton Voltage Multiplier‖, IOSR Journal of Engineering (IOSRJEN), Vol. 04, Issue 07 (July. 2014). PP 16-23
[7]. Naidu MS, Kamaraju V (2004),‖High Voltage Engineering‖, Third Edn. McGraw- Hill Company Ltd. pp. 146-156
[8]. C. L. Wadhwa, ―High Voltage Engineering‖.New Age International Publication. pp. 56-63.